Deterministic Ethernet Communications for Modular Active Protection Systems

US Army TARDEC is interested in investigating deterministic Ethernet technologies applicable to the Modular APS domain and establishing high-speed and deterministic communications infrastructure (hardware and/or software) for safety-critical ground vehicle survivability networks that provide microsecond to sub-millisecond resolution time-synchronization services to distributed survivability applications. Solutions that leverage open standards where appropriate are preferred. Offerors shall propose a phased approach. The first phase of development entails a feasibility study, concept development, theoretical performance analysis, risk analysis, cost analysis and concept design of a high-speed communications infrastructure. Describe in detail what standards will be used and what deviations from the standards will be made. The performance analysis shall describe the theoretical worst- and best-case latency, jitter, effective bandwidth, and overhead for a range of likely scenarios. It shall also describe the theoretical worst- and best-case accuracy, drift and jitter for time synchronization between multiple end-points. The risk and cost analysis shall present multiple options that may reduce risk or cost or provide additional capabilities or performance. This phase of development shall provide a proof of concept that demonstrates the underlying time-synchronization and scheduled data transmission functionality required for future development. The second phase of development shall focus on developing a prototype using the technology described in the earlier development with various risk and cost options selected by the Government POC. The prototype shall implement basic functionality including time-synchronization and scheduled data transmission in a multi-node network. The contractor shall develop a test bed to assess the actual performance of the network and time-synchronization solution under a range of likely scenarios as compared the theoretical performance documented in the earlier development. The causes of any discrepancies between actual and theoretical performance shall be determined and possible solutions shall be identified. The test bed shall test and validate all API and driver functionality and shall demonstrate compatibility and interoperability with other COTS devices that implement the same standard(s).